/*
 * FreeRTOS Kernel V11.1.0
 * Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
 *
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy of
 * this software and associated documentation files (the "Software"), to deal in
 * the Software without restriction, including without limitation the rights to
 * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
 * the Software, and to permit persons to whom the Software is furnished to do so,
 * subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in all
 * copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
 * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
 * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * https://www.FreeRTOS.org
 * https://github.com/FreeRTOS
 *
 */

/*-----------------------------------------------------------
 * Implementation of functions defined in portable.h for the ARM7 port.
 *
 * Components that can be compiled to either ARM or THUMB mode are
 * contained in this file.  The ISR routines, which can only be compiled
 * to ARM mode are contained in portISR.c.
 *----------------------------------------------------------*/
// 参考修改链接 https://www.1000bd.com/Article/Index/906171
/* Standard includes. */
#include <stdlib.h>

/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "f1c100s_intc.h"
#include "f1c100s_timer.h"
#include "time0.h"
/* Constants required to setup the task context. */
#define portINITIAL_SPSR ((StackType_t)0x1f) /* System mode, ARM mode, interrupts enabled. */
#define portTHUMB_MODE_BIT ((StackType_t)0x20)
#define portINSTRUCTION_SIZE ((StackType_t)4)
#define portNO_CRITICAL_SECTION_NESTING ((StackType_t)0)

/* Constants required to setup the tick ISR. */
#define portENABLE_TIMER ((uint8_t)0x01)
#define portPRESCALE_VALUE 0x00
#define portINTERRUPT_ON_MATCH ((uint32_t)0x01)
#define portRESET_COUNT_ON_MATCH ((uint32_t)0x02)

/* Constants required to setup the VIC for the tick ISR. */
#define portTIMER_VIC_CHANNEL ((uint32_t)0x0004)
#define portTIMER_VIC_CHANNEL_BIT ((uint32_t)0x0010)
#define portTIMER_VIC_ENABLE ((uint32_t)0x0020)

/*-----------------------------------------------------------*/

/* Setup the timer to generate the tick interrupts. */
static void prvSetupTimerInterrupt(void);

/*
 * The scheduler can only be started from ARM mode, so
 * vPortISRStartFirstSTask() is defined in portISR.c.
 */
extern void vPortISRStartFirstTask(void);

/*-----------------------------------------------------------*/

/*
 * Initialise the stack of a task to look exactly as if a call to
 * portSAVE_CONTEXT had been called.
 *
 * See header file for description.
 */
StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack,
                                   TaskFunction_t pxCode,
                                   void *pvParameters)
{
    StackType_t *pxOriginalTOS;

    pxOriginalTOS = pxTopOfStack;

    /* To ensure asserts in tasks.c don't fail, although in this case the assert
     * is not really required. */
    pxTopOfStack--;

    /* Setup the initial stack of the task.  The stack is set exactly as
     * expected by the portRESTORE_CONTEXT() macro. */

    /* First on the stack is the return address - which in this case is the
     * start of the task.  The offset is added to make the return address appear
     * as it would within an IRQ ISR. */
    *pxTopOfStack = (StackType_t)pxCode + portINSTRUCTION_SIZE;
    pxTopOfStack--;

    *pxTopOfStack = (StackType_t)0xaaaaaaaa; /* R14 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)pxOriginalTOS; /* Stack used when task starts goes in R13. */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x12121212; /* R12 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x11111111; /* R11 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x10101010; /* R10 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x09090909; /* R9 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x08080808; /* R8 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x07070707; /* R7 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x06060606; /* R6 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x05050505; /* R5 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x04040404; /* R4 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x03030303; /* R3 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x02020202; /* R2 */
    pxTopOfStack--;
    *pxTopOfStack = (StackType_t)0x01010101; /* R1 */
    pxTopOfStack--;

    /* When the task starts is will expect to find the function parameter in
     * R0. */
    *pxTopOfStack = (StackType_t)pvParameters; /* R0 */
    pxTopOfStack--;

    /* The last thing onto the stack is the status register, which is set for
     * system mode, with interrupts enabled. */
    *pxTopOfStack = (StackType_t)portINITIAL_SPSR;

    if (((uint32_t)pxCode & 0x01UL) != 0x00)
    {
        /* We want the task to start in thumb mode. */
 
            *pxTopOfStack |= portTHUMB_MODE_BIT;
 
    }

    pxTopOfStack--;

    /* Some optimisation levels use the stack differently to others.  This
     * means the interrupt flags cannot always be stored on the stack and will
     * instead be stored in a variable, which is then saved as part of the
     * tasks context. */
    *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;

    return pxTopOfStack;
}
/*-----------------------------------------------------------*/

BaseType_t xPortStartScheduler(void)
{
    /* Start the timer that generates the tick ISR.  Interrupts are disabled
     * here already. */
    prvSetupTimerInterrupt();

    /* Start the first task. */
    vPortISRStartFirstTask();

    /* Should not get here! */
    return 0;
}
/*-----------------------------------------------------------*/

void vPortEndScheduler(void)
{
    /* It is unlikely that the ARM port will require this function as there
     * is nothing to return to.  */
}
/*-----------------------------------------------------------*/

/*
 * Setup the timer 0 to generate the tick interrupts at the required frequency.
 */
static void prvSetupTimerInterrupt(void)
{
    extern void vTickISR(void);

    /* Configure the timer 0 */
    tim_init(TIM0, TIM_MODE_CONT, TIM_SRC_HOSC, TIM_PSC_1);
    tim_set_period(TIM0, 24000000UL/1000UL);
    tim_int_enable(TIM0);

    /* Configure the VIC to service IRQ4 (triggered by the timer) properly */
    intc_set_irq_handler(IRQ_TIMER0, vTickISR);
//	intc_set_priority(IRQ_TIMER0, uint8_t prio);
    intc_enable_irq(IRQ_TIMER0);

    tim_start(TIM0);
}
/*-----------------------------------------------------------*/
